Philips
Freelance Senior Digital Designer/ Integrator
Project description:
At Philips Research the ASIC team is working on the design of various mixed-signal Application-Specific ICs (ASICs) for biomedical applications. These CMOS ASICs usually perform sensor interfacing functions with a significant digital content. The candidate will take part in the design of an ASIC for a novel and exciting application, join the team of digital design engineers, working closely together with the analog and mixed-signal team.
Requirements:
The candidate must meet the following minimum requirements:
Has University Degree (Master or Bachelor) in Electrical Engineering.
At least five years of experience in digital design, verification and top-level integration.
Solid understanding of the digital ASIC design flows, from an architecture to RTL, digital and mixed-signal verification, design synthesis, physical implementation, and static timing analyses.
Comprehensive knowledge of VHDL, system Verilog and preferably python.
Translate potentially incomplete customer requirements into digital design requirements and proposals.
Supporting digital verification and physical implementation activities.
Being able to specify, integrate complex IP blocks and define integration baselines.
Good understanding of bus protocols and peripherals such as USB, SPI, I2C, UART etc. required.
Familiar with DFT insertion including test-pattern generation.
Working with analog and mixed-signal teams daily.
Reporting progress and issues to the project leader and customer.
Fluent in English.
Experience in IC realization of DSP algorithms and functions for sensor interfacing applications, including digital filters, sample rate converters and communication protocols preferred.
Experience with constraint random verification using system Verilog is a plus.
Basic knowledge of Mentor Graphics HDL Designer and Questasim and Cadence Virtuoso for analog design is beneficial.
Hands-on experience in digital backend is a big advantage