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Philips

Senior Analog/Mixed-Signal IC-Design Engineer (Freelance)

Posted May 18, 2021
Project ID: PHILJP00023212
Location
Eindhoven , Noord Brabant
Duration
7 months
(Jun 1, 2021 - Dec 31, 2021)
Hours/week
40 hrs/week
Payrate range
57 - 86 €/hr

At Philips Research a project is ongoing for the design of a mixed-signal ASIC for biomedical applications.


The 40nm CMOS IC includes analog, digital and mixed-signal circuits. The candidate will contribute to the design of this IC.


Requirements:

The candidate must meet the following minimum requirements.

- At least seven years of experience in analog circuit design, simulation and layout using Cadence. Designing circuits such as amplifiers, buffers, samplers, current sources, etc.

- Understanding of CMOS technologies in general: working with design rules, understanding process specification documents.

-Creating simulation test-benches for dc, ca, transient simulations using ADE-L and ADE-XL. - Understanding low-noise analog circuit design and LDO design.

- Familiar with CMOS technologies at various technology nodes such as 180nm to 40nm.

- Experience with ADC and/or DAC design is beneficial.

- Experience with mixed-signal design and verification using AMS is a plus.

- Basic knowledge of digital design / Encounter is beneficial.

- Experience with full-custom IC layout design using Cadence tools Virtuoso, Layout-XL, DRC and LVS.

- Understanding and implementing layout techniques such as symmetry and shielding.

- Creating layout designs according to a floorplan.

- Basic understanding of Unix.

- Team player: daily interaction with design team.

- Reporting progress and issues.

- Fluent in English.


Location: High Tech Campus, Eindhoven for at least the first month. Part-time remote working optional depending on project and progress


Schedule: Full-time, at least 4 days/week


Duration: 6 months initially


Starting date: June 2021

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